Semiconductor manufacturers face a constant challenge to comply with Moore's Law. They constantly strive to continually decrease feature sizes, such as active and passive devices, interconnecting wire widths and thicknesses and power consumption as well as increase device density, wire density and operating frequencies.
As the semiconductor devices are getting smaller, they show degradation in performance. For example, planar metal-oxide-semiconductor field effect (MOSFET) transistor gates do not have abilities to adequately control channels. In addition, reduction in size leads to lower currents in the channels, leakage currents, and short channel effects to name a few.
The semiconductor industry came up with a solution to move away from the planar structures and introduce three dimensional (3D) features. For example, channels have a form of a 3D bar or a similar 3D structure, which is usually referred as a “fin” in the so called FinFET transistors. The 3D channel can be controlled from more than one side, which leads to an improvement in device functionality. Moreover, the FinFET transistors have higher drain currents, have higher switching speeds, lower switching voltages, less leakage currents, and consume less power.
In addition to the above discussed challenges, the semiconductor manufacturers have to deal with more specific ones that are pertinent to particular device functionalities. For example, high-voltage MOSFETs, which can be used in switches or in other high-power applications, need to be designed to have high breakdown voltages. The voltage breakdown is usually caused by the Zener or the avalanche effects and is highly dependent on a particular device implementation.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.